An integrated circuit may be formed using a temporary, or sacrificial, silicon nitride feature. A portion, or all, of the silicon nitride feature may be removed during fabrication of the integrated circuit. It may be desirable to remove the silicon nitride feature without damaging silicon dioxide features or silicon features of the integrated circuit, such as thin layers of silicon dioxide over active areas, gates, silicon dioxide spacers on gates, and/or the active areas. The silicon nitride feature may have a surface layer of oxidized silicon which may inhibit removal of the underlying silicon nitride feature. Conventional processes used to remove silicon nitride include wet etch using hot phosphoric acid and silicon nitride plasma etch.
Silicon nitride removal using hot phosphoric acid may result in non-uniform removal due to etch micro loading effects resulting in undesired non-uniformity of performance parameters of the integrated circuit. In addition, the hot phosphoric acid etch may be preceded by a dilute hydrofluoric acid etch to remove the surface layer of oxidized silicon from the silicon nitride feature. The dilute hydrofluoric acid etch may undesirably remove thin layers of silicon nitride over active areas and/or silicon dioxide spacers on gates. The subsequent hot phosphoric acid may undesirably attack exposed silicon, such as silicon active areas or polysilicon gates which were exposed by the dilute hydrofluoric acid etch.
A silicon nitride plasma etch may also be preceded by a plasma oxide etch to remove the surface layer of oxidized silicon from the silicon nitride. The plasma oxide etch uniformity and etch rate are difficult to control and may undesirably remove exposed silicon dioxide on active areas and/or gates, exposing the active areas and gates to the silicon nitride plasma etch, resulting in damage to the active areas and gates.